﻿/**
 *******************************************************************************
 * @file  main.c
 * @brief Main program.
 @verbatim
   Change Logs:
   Date             Author          Notes
   2025-01-02       CDT             First version
 @endverbatim
 *******************************************************************************
 * Copyright (C) 2022, Xiaohua Semiconductor Co., Ltd. All rights reserved.
 *
 * This software component is licensed by XHSC under BSD 3-Clause license
 * (the "License"); You may not use this file except in compliance with the
 * License. You may obtain a copy of the License at:
 *                    opensource.org/licenses/BSD-3-Clause
 *
 *******************************************************************************
 */

/*******************************************************************************
 * Include files
 ******************************************************************************/
#include "main.h"

/*******************************************************************************
 * Local type definitions ('typedef')
 ******************************************************************************/

/*******************************************************************************
 * Local pre-processor symbols/macros ('#define')
 ******************************************************************************/
/*******************************************************************************
 * Global variable definitions (declared in header file with 'extern')
 ******************************************************************************/

/*******************************************************************************
 * Local function prototypes ('static')
 ******************************************************************************/
/* INT_SRC_PORT_EIRQ6 Callback. */
static void INT_SRC_PORT_EIRQ6_IrqCallback(void);
/* INT_SRC_PORT_EIRQ10 Callback. */
static void INT_SRC_PORT_EIRQ10_IrqCallback(void);
/* INT_SRC_USART1_TCI Callback. */
static void INT_SRC_USART1_TCI_IrqCallback(void);
/* INT_SRC_USART1_RTO Callback. */
static void INT_SRC_USART1_RTO_IrqCallback(void);
/* INT_SRC_USART3_TCI Callback. */
static void INT_SRC_USART3_TCI_IrqCallback(void);
/* INT_SRC_USART3_RI Callback. */
static void INT_SRC_USART3_RI_IrqCallback(void);
/* INT_SRC_DMA1_TC0 Callback. */
static void INT_SRC_DMA1_TC0_IrqCallback(void);
/* INT_SRC_DMA1_TC1 Callback. */
static void INT_SRC_DMA1_TC1_IrqCallback(void);
/* INT_SRC_DMA1_TC2 Callback. */
static void INT_SRC_DMA1_TC2_IrqCallback(void);
/* INT_SRC_DMA1_TC3 Callback. */
static void INT_SRC_DMA1_TC3_IrqCallback(void);
/* INT_SRC_DMA2_TC0 Callback. */
static void INT_SRC_DMA2_TC0_IrqCallback(void);
/* INT_SRC_DMA2_TC1 Callback. */
static void INT_SRC_DMA2_TC1_IrqCallback(void);
/* INT_SRC_DMA2_TC2 Callback. */
static void INT_SRC_DMA2_TC2_IrqCallback(void);
/* INT_SRC_DMA2_TC3 Callback. */
static void INT_SRC_DMA2_TC3_IrqCallback(void);
/* INT_SRC_RTC_PRD Callback. */
static void INT_SRC_RTC_PRD_IrqCallback(void);
/* INT_SRC_TMRA_1_UDF Callback. */
static void INT_SRC_TMRA_1_UDF_IrqCallback(void);
/* INT_SRC_I2C1_RXI Callback. */
static void INT_SRC_I2C1_RXI_IrqCallback(void);
/* INT_SRC_I2C1_TXI Callback. */
static void INT_SRC_I2C1_TXI_IrqCallback(void);
/* INT_SRC_I2C1_EEI Callback. */
static void INT_SRC_I2C1_EEI_IrqCallback(void);
/* INT_SRC_I2C3_RXI Callback. */
static void INT_SRC_I2C3_RXI_IrqCallback(void);
/* INT_SRC_I2C3_TXI Callback. */
static void INT_SRC_I2C3_TXI_IrqCallback(void);
/* INT_SRC_I2C3_EEI Callback. */
static void INT_SRC_I2C3_EEI_IrqCallback(void);
/* INT_SRC_I2C1_TEI Callback. */
static void INT_SRC_I2C1_TEI_IrqCallback(void);
/* INT_SRC_I2C3_TEI Callback. */
static void INT_SRC_I2C3_TEI_IrqCallback(void);
/* INT_SRC_RTC_ALM Callback. */
static void INT_SRC_RTC_ALM_IrqCallback(void);
/* INT_SRC_SPI3_SPEI Callback. */
static void INT_SRC_SPI3_SPEI_IrqCallback(void);
/* Configures EIRQ. */
static void App_EIRQCfg(void);
/* Configures USBFS. */
static void App_USBFSCfg(void);
/* Configures TimerA. */
static void App_TimerACfg(void);
/* Configures Timer0. */
static void App_Timer0Cfg(void);
/* Configures USARTx. */
static void App_USARTxCfg(void);
/* Configures I2Cx. */
static void App_I2CxCfg(void);
/* Configures SPIx. */
static void App_SPIxCfg(void);
/* Configures RTC. */
static void App_RTCCfg(void);
/* Configures WDT. */
static void App_WDTCfg(void);
/*******************************************************************************
 * Local variable definitions ('static')
 ******************************************************************************/

/*******************************************************************************
 * Function implementation - global ('extern') and local ('static')
 ******************************************************************************/
//Clock Config
static void App_ClkCfg(void)
{
    /* Set bus clock div. */
    CLK_SetClockDiv(CLK_BUS_CLK_ALL, (CLK_HCLK_DIV1 | CLK_EXCLK_DIV2 | CLK_PCLK0_DIV1 | CLK_PCLK1_DIV2 | \
                                   CLK_PCLK2_DIV4 | CLK_PCLK3_DIV4 | CLK_PCLK4_DIV2));
    /* sram init include read/write wait cycle setting */
    SRAM_SetWaitCycle(SRAM_SRAM_ALL, SRAM_WAIT_CYCLE1, SRAM_WAIT_CYCLE1);
    SRAM_SetWaitCycle(SRAM_SRAMH, SRAM_WAIT_CYCLE0, SRAM_WAIT_CYCLE0);
    /* flash read wait cycle setting */
    EFM_SetWaitCycle(EFM_WAIT_CYCLE5);
    /* XTAL config */
    stc_clock_xtal_init_t stcXtalInit;
    (void)CLK_XtalStructInit(&stcXtalInit);
    stcXtalInit.u8State = CLK_XTAL_ON;
    stcXtalInit.u8Drv = CLK_XTAL_DRV_HIGH;
    stcXtalInit.u8Mode = CLK_XTAL_MD_OSC;
    stcXtalInit.u8StableTime = CLK_XTAL_STB_2MS;
    (void)CLK_XtalInit(&stcXtalInit);
    /* MPLL config */
    stc_clock_pll_init_t stcMPLLInit;
    (void)CLK_PLLStructInit(&stcMPLLInit);
    stcMPLLInit.PLLCFGR = 0UL;
    stcMPLLInit.PLLCFGR_f.PLLM = (5UL - 1UL);
    stcMPLLInit.PLLCFGR_f.PLLN = (80UL - 1UL);
    stcMPLLInit.PLLCFGR_f.PLLP = (2UL - 1UL);
    stcMPLLInit.PLLCFGR_f.PLLQ = (16UL - 1UL);
    stcMPLLInit.PLLCFGR_f.PLLR = (16UL - 1UL);
    stcMPLLInit.u8PLLState = CLK_PLL_ON;
    stcMPLLInit.PLLCFGR_f.PLLSRC = CLK_PLL_SRC_XTAL;
    (void)CLK_PLLInit(&stcMPLLInit);
    /* UPLL config */
    stc_clock_pllx_init_t stcUPLLInit;
    (void)CLK_PLLxStructInit(&stcUPLLInit);
    stcUPLLInit.PLLCFGR = 0UL;
    stcUPLLInit.PLLCFGR_f.PLLM = (5UL - 1UL);
    stcUPLLInit.PLLCFGR_f.PLLN = (48UL - 1UL);
    stcUPLLInit.PLLCFGR_f.PLLP = (4UL - 1UL);
    stcUPLLInit.PLLCFGR_f.PLLQ = (16UL - 1UL);
    stcUPLLInit.PLLCFGR_f.PLLR = (5UL - 1UL);
    stcUPLLInit.u8PLLState = CLK_PLLX_ON;
    (void)CLK_PLLxInit(&stcUPLLInit);
    /* 3 cycles for 126MHz ~ 200MHz */
    GPIO_SetReadWaitCycle(GPIO_RD_WAIT3);
    /* Switch driver ability */
    PWC_HighSpeedToHighPerformance();
    /* Set the system clock source */
    CLK_SetSysClockSrc(CLK_SYSCLK_SRC_PLL);
    /* Specifies the clock source of ADC. */
    CLK_SetPeriClockSrc(CLK_PERIPHCLK_PLLXP);
}

//Port Config
static void App_PortCfg(void)
{
    /* GPIO initialize */
    stc_gpio_init_t stcGpioInit;
    /* PC14 set to XTAL32-OUT */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_C, GPIO_PIN_14, &stcGpioInit);

    /* PC15 set to XTAL32-IN */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_C, GPIO_PIN_15, &stcGpioInit);

    /* PH0 set to XTAL-EXT/XTAL-OUT */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_H, GPIO_PIN_00, &stcGpioInit);

    /* PH1 set to XTAL-IN */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinAttr = PIN_ATTR_ANALOG;
    (void)GPIO_Init(GPIO_PORT_H, GPIO_PIN_01, &stcGpioInit);

    /* PB10 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinDrv = PIN_HIGH_DRV;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_10, &stcGpioInit);

    /* PA10 set to EIRQ10 */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16ExtInt = PIN_EXTINT_ON;
    (void)GPIO_Init(GPIO_PORT_A, GPIO_PIN_10, &stcGpioInit);

    /* PB6 set to EIRQ6 */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16ExtInt = PIN_EXTINT_ON;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_06, &stcGpioInit);

    /* PB7 set to GPIO-Output */
    (void)GPIO_StructInit(&stcGpioInit);
    stcGpioInit.u16PinDir = PIN_DIR_OUT;
    stcGpioInit.u16PinAttr = PIN_ATTR_DIGITAL;
    (void)GPIO_Init(GPIO_PORT_B, GPIO_PIN_07, &stcGpioInit);

    GPIO_SetFunc(GPIO_PORT_H,GPIO_PIN_02,GPIO_FUNC_33);//USART3-RX
    
    GPIO_SetFunc(GPIO_PORT_C,GPIO_PIN_13,GPIO_FUNC_32);//USART3-TX
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_00,GPIO_FUNC_42);//SPI1-SS0
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_01,GPIO_FUNC_43);//SPI1-SCK
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_02,GPIO_FUNC_41);//SPI1-MISO
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_03,GPIO_FUNC_40);//SPI1-MOSI
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_04,GPIO_FUNC_46);//SPI2-SS0
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_05,GPIO_FUNC_47);//SPI2-SCK
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_06,GPIO_FUNC_45);//SPI2-MISO
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_07,GPIO_FUNC_44);//SPI2-MOSI
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_00,GPIO_FUNC_34);//USART1-RTS
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_01,GPIO_FUNC_33);//USART1-RX
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_02,GPIO_FUNC_32);//USART1-TX
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_12,GPIO_FUNC_40);//SPI3-MOSI
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_13,GPIO_FUNC_41);//SPI3-MISO
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_14,GPIO_FUNC_43);//SPI3-SCK
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_15,GPIO_FUNC_42);//SPI3-SS0
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_08,GPIO_FUNC_49);//I2C1-SCL
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_09,GPIO_FUNC_10);//USBFS-VBUS
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_11,GPIO_FUNC_10);//USBFS-DM
    
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_12,GPIO_FUNC_10);//USBFS-DP
    
    GPIO_SetDebugPort(GPIO_PIN_TDI, DISABLE);
    GPIO_SetFunc(GPIO_PORT_A,GPIO_PIN_15,GPIO_FUNC_48);//I2C1-SDA
    
    GPIO_SetDebugPort(GPIO_PIN_TRST, DISABLE);
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_04,GPIO_FUNC_36);//USART4-TX
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_05,GPIO_FUNC_37);//USART4-RX
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_08,GPIO_FUNC_48);//I2C3-SDA
    
    GPIO_SetFunc(GPIO_PORT_B,GPIO_PIN_09,GPIO_FUNC_49);//I2C3-SCL
    
}

//Int Config
static void App_IntCfg(void)
{
    stc_irq_signin_config_t stcIrq;

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_PORT_EIRQ6;
    stcIrq.enIRQn = INT033_IRQn;
    stcIrq.pfnCallback = &INT_SRC_PORT_EIRQ6_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT033_IRQn);
    NVIC_SetPriority(INT033_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT033_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_PORT_EIRQ10;
    stcIrq.enIRQn = INT032_IRQn;
    stcIrq.pfnCallback = &INT_SRC_PORT_EIRQ10_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT032_IRQn);
    NVIC_SetPriority(INT032_IRQn, DDL_IRQ_PRIO_05);
    NVIC_EnableIRQ(INT032_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART1_TCI;
    stcIrq.enIRQn = INT080_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART1_TCI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT080_IRQn);
    NVIC_SetPriority(INT080_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT080_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART1_RTO;
    stcIrq.enIRQn = INT081_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART1_RTO_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT081_IRQn);
    NVIC_SetPriority(INT081_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT081_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART3_TCI;
    stcIrq.enIRQn = INT086_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART3_TCI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT086_IRQn);
    NVIC_SetPriority(INT086_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT086_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_USART3_RI;
    stcIrq.enIRQn = INT087_IRQn;
    stcIrq.pfnCallback = &INT_SRC_USART3_RI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT087_IRQn);
    NVIC_SetPriority(INT087_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT087_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC0;
    stcIrq.enIRQn = INT000_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC0_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT000_IRQn);
    NVIC_SetPriority(INT000_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT000_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC1;
    stcIrq.enIRQn = INT001_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC1_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT001_IRQn);
    NVIC_SetPriority(INT001_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT001_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC2;
    stcIrq.enIRQn = INT040_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC2_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT040_IRQn);
    NVIC_SetPriority(INT040_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT040_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA1_TC3;
    stcIrq.enIRQn = INT041_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA1_TC3_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT041_IRQn);
    NVIC_SetPriority(INT041_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT041_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC0;
    stcIrq.enIRQn = INT042_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC0_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT042_IRQn);
    NVIC_SetPriority(INT042_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT042_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC1;
    stcIrq.enIRQn = INT043_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC1_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT043_IRQn);
    NVIC_SetPriority(INT043_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT043_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC2;
    stcIrq.enIRQn = INT039_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC2_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT039_IRQn);
    NVIC_SetPriority(INT039_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT039_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_DMA2_TC3;
    stcIrq.enIRQn = INT038_IRQn;
    stcIrq.pfnCallback = &INT_SRC_DMA2_TC3_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT038_IRQn);
    NVIC_SetPriority(INT038_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT038_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_RTC_PRD;
    stcIrq.enIRQn = INT044_IRQn;
    stcIrq.pfnCallback = &INT_SRC_RTC_PRD_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT044_IRQn);
    NVIC_SetPriority(INT044_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT044_IRQn);

    (void)INTC_ShareIrqCmd(INT_SRC_USART3_EI, ENABLE);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_TMRA_1_UDF;
    stcIrq.enIRQn = INT082_IRQn;
    stcIrq.pfnCallback = &INT_SRC_TMRA_1_UDF_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT082_IRQn);
    NVIC_SetPriority(INT082_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT082_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C1_RXI;
    stcIrq.enIRQn = INT110_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C1_RXI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT110_IRQn);
    NVIC_SetPriority(INT110_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT110_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C1_TXI;
    stcIrq.enIRQn = INT111_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C1_TXI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT111_IRQn);
    NVIC_SetPriority(INT111_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT111_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C1_EEI;
    stcIrq.enIRQn = INT112_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C1_EEI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT112_IRQn);
    NVIC_SetPriority(INT112_IRQn, DDL_IRQ_PRIO_04);
    NVIC_EnableIRQ(INT112_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C3_RXI;
    stcIrq.enIRQn = INT113_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C3_RXI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT113_IRQn);
    NVIC_SetPriority(INT113_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT113_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C3_TXI;
    stcIrq.enIRQn = INT114_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C3_TXI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT114_IRQn);
    NVIC_SetPriority(INT114_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT114_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C3_EEI;
    stcIrq.enIRQn = INT115_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C3_EEI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT115_IRQn);
    NVIC_SetPriority(INT115_IRQn, DDL_IRQ_PRIO_04);
    NVIC_EnableIRQ(INT115_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C1_TEI;
    stcIrq.enIRQn = INT002_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C1_TEI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT002_IRQn);
    NVIC_SetPriority(INT002_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT002_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_I2C3_TEI;
    stcIrq.enIRQn = INT004_IRQn;
    stcIrq.pfnCallback = &INT_SRC_I2C3_TEI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT004_IRQn);
    NVIC_SetPriority(INT004_IRQn, DDL_IRQ_PRIO_11);
    NVIC_EnableIRQ(INT004_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_RTC_ALM;
    stcIrq.enIRQn = INT045_IRQn;
    stcIrq.pfnCallback = &INT_SRC_RTC_ALM_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT045_IRQn);
    NVIC_SetPriority(INT045_IRQn, DDL_IRQ_PRIO_06);
    NVIC_EnableIRQ(INT045_IRQn);

    /* IRQ sign-in */
    stcIrq.enIntSrc = INT_SRC_SPI3_SPEI;
    stcIrq.enIRQn = INT091_IRQn;
    stcIrq.pfnCallback = &INT_SRC_SPI3_SPEI_IrqCallback;
    (void)INTC_IrqSignIn(&stcIrq);
    /* NVIC config */
    NVIC_ClearPendingIRQ(INT091_IRQn);
    NVIC_SetPriority(INT091_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT091_IRQn);

    /* ShareIrq NVIC config */
    NVIC_ClearPendingIRQ(INT137_IRQn);
    NVIC_SetPriority(INT137_IRQn, DDL_IRQ_PRIO_15);
    NVIC_EnableIRQ(INT137_IRQn);

}

//Dma Config
static void App_DmaCfg(void)
{
    /* DMA1 FCG enable */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_DMA1, ENABLE);
    /* DMA2 FCG enable */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_DMA2, ENABLE);
    /* AOS FCG enable */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE);

    stc_dma_init_t stcDmaInit;

    /* DMA1_CH0 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_0, EVT_SRC_USART3_TI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA1, DMA_CH0, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH0);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH0, ENABLE);

    /* DMA1_CH1 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_1, EVT_SRC_USART1_TI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA1, DMA_CH1, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH1);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH1, ENABLE);

    /* DMA1_CH2 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_2, EVT_SRC_USART1_RI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA1, DMA_CH2, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH2);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH2, ENABLE);

    /* DMA1_CH3 Config */
    AOS_SetTriggerEventSrc(AOS_DMA1_3, EVT_SRC_USART4_TI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA1, DMA_CH3, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA1, DMA_INT_TC_CH3);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA1, DMA_CH3, ENABLE);

    /* DMA2_CH0 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_0, EVT_SRC_SPI1_SPTI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH0, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH0);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH0, ENABLE);

    /* DMA2_CH1 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_1, EVT_SRC_SPI2_SPRI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH1, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH1);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH1, ENABLE);

    /* DMA2_CH2 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_2, EVT_SRC_SPI3_SPTI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH2, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH2);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH2, ENABLE);

    /* DMA2_CH3 Config */
    AOS_SetTriggerEventSrc(AOS_DMA2_3, EVT_SRC_SPI3_SPRI);
    /* Base Config */
    (void)DMA_StructInit(&stcDmaInit);

    stcDmaInit.u32IntEn = DMA_INT_ENABLE;
    stcDmaInit.u32BlockSize = 1UL;
    stcDmaInit.u32TransCount = 0UL;
    stcDmaInit.u32DataWidth = DMA_DATAWIDTH_8BIT;
    stcDmaInit.u32DestAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddr = (uint32_t)0x00000000UL;
    stcDmaInit.u32SrcAddrInc = DMA_SRC_ADDR_FIX;
    stcDmaInit.u32DestAddrInc = DMA_DEST_ADDR_FIX;

    (void)DMA_Init(CM_DMA2, DMA_CH3, &stcDmaInit);

    DMA_ClearTransCompleteStatus(CM_DMA2, DMA_INT_TC_CH3);
    /* DMA channel enable */
    (void)DMA_ChCmd(CM_DMA2, DMA_CH3, ENABLE);

    /* DMA module enable */
    DMA_Cmd(CM_DMA1, ENABLE);
    /* DMA module enable */
    DMA_Cmd(CM_DMA2, ENABLE);
}
/**
 * @brief  Main function of the project
 * @param  None
 * @retval int32_t return value, if needed
 */
int32_t main(void)
{
    /* Register write unprotected for some required peripherals. */
    LL_PERIPH_WE(LL_PERIPH_ALL);
    //Clock Config
    App_ClkCfg();
    //Port Config
    App_PortCfg();
    //Int Config
    App_IntCfg();
    //EIRQ Config
    App_EIRQCfg();
    //USBFS Config
    App_USBFSCfg();
    //TimerA Config
    App_TimerACfg();
    //Timer0 Config
    App_Timer0Cfg();
    //USARTx Config
    App_USARTxCfg();
    //I2Cx Config
    App_I2CxCfg();
    //SPIx Config
    App_SPIxCfg();
    //RTC Config
    App_RTCCfg();
    //WDT Config
    App_WDTCfg();
    //Dma Config
    App_DmaCfg();
    /* Register write protected for some required peripherals. */
    LL_PERIPH_WP(LL_PERIPH_ALL);
    for (;;) {

    }
}

/* INT_SRC_PORT_EIRQ6 Callback. */
static void INT_SRC_PORT_EIRQ6_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_PORT_EIRQ10 Callback. */
static void INT_SRC_PORT_EIRQ10_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART1_TCI Callback. */
static void INT_SRC_USART1_TCI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART1_RTO Callback. */
static void INT_SRC_USART1_RTO_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART3_TCI Callback. */
static void INT_SRC_USART3_TCI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART3_RI Callback. */
static void INT_SRC_USART3_RI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC0 Callback. */
static void INT_SRC_DMA1_TC0_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC1 Callback. */
static void INT_SRC_DMA1_TC1_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC2 Callback. */
static void INT_SRC_DMA1_TC2_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA1_TC3 Callback. */
static void INT_SRC_DMA1_TC3_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC0 Callback. */
static void INT_SRC_DMA2_TC0_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC1 Callback. */
static void INT_SRC_DMA2_TC1_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC2 Callback. */
static void INT_SRC_DMA2_TC2_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_DMA2_TC3 Callback. */
static void INT_SRC_DMA2_TC3_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_RTC_PRD Callback. */
static void INT_SRC_RTC_PRD_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_USART3_EI Callback. */
void USART3_RxError_IrqHandler(void)
{
    //add your codes here
}
/* INT_SRC_TMRA_1_UDF Callback. */
static void INT_SRC_TMRA_1_UDF_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C1_RXI Callback. */
static void INT_SRC_I2C1_RXI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C1_TXI Callback. */
static void INT_SRC_I2C1_TXI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C1_EEI Callback. */
static void INT_SRC_I2C1_EEI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C3_RXI Callback. */
static void INT_SRC_I2C3_RXI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C3_TXI Callback. */
static void INT_SRC_I2C3_TXI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C3_EEI Callback. */
static void INT_SRC_I2C3_EEI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C1_TEI Callback. */
static void INT_SRC_I2C1_TEI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_I2C3_TEI Callback. */
static void INT_SRC_I2C3_TEI_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_RTC_ALM Callback. */
static void INT_SRC_RTC_ALM_IrqCallback(void)
{
    //add your codes here
}
/* INT_SRC_SPI3_SPEI Callback. */
static void INT_SRC_SPI3_SPEI_IrqCallback(void)
{
    //add your codes here
}

//EIRQ Config
static void App_EIRQCfg(void)
{
    stc_extint_init_t stcExtIntInit;

    /* EXTINT_CH10 config */
    (void)EXTINT_StructInit(&stcExtIntInit);
    stcExtIntInit.u32Filter = EXTINT_FILTER_ON;
    stcExtIntInit.u32FilterClock = EXTINT_FCLK_DIV1;
    stcExtIntInit.u32Edge = EXTINT_TRIG_BOTH;
    (void)EXTINT_Init(EXTINT_CH10, &stcExtIntInit);

    /* EXTINT_CH06 config */
    (void)EXTINT_StructInit(&stcExtIntInit);
    stcExtIntInit.u32Filter = EXTINT_FILTER_ON;
    stcExtIntInit.u32FilterClock = EXTINT_FCLK_DIV1;
    stcExtIntInit.u32Edge = EXTINT_TRIG_FALLING;
    (void)EXTINT_Init(EXTINT_CH06, &stcExtIntInit);

}

//USBFS Config
static void App_USBFSCfg(void)
{
}

//TimerA Config
static void App_TimerACfg(void)
{
    stc_tmra_init_t stcTmraInit;

    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE);
    /* TimerA trigger event 0 set */
    AOS_SetTriggerEventSrc(AOS_TMRA_0, EVT_SRC_TMRA_1_UDF);

    /* Enable TMRA_1 peripheral clock */
    FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_TMRA_1, ENABLE);

    /************************* Configure TMRA_1 counter *************************/
    (void)TMRA_StructInit(&stcTmraInit);
    /* Config software count */
    stcTmraInit.sw_count.u8ClockDiv = TMRA_CLK_DIV8;
    stcTmraInit.sw_count.u8CountMode = TMRA_MD_SAWTOOTH;
    stcTmraInit.sw_count.u8CountDir = TMRA_DIR_DOWN;
    stcTmraInit.u32PeriodValue = 0x30D4U;
    (void)TMRA_Init(CM_TMRA_1, &stcTmraInit);

    /* Enable underflow interrupt */
    TMRA_IntCmd(CM_TMRA_1, TMRA_INT_UDF, ENABLE);

    /* Config hardware start */
    TMRA_HWStartCondCmd(CM_TMRA_1, TMRA_START_COND_EVT, ENABLE);

    /* Config hardware clear */
    TMRA_HWClearCondCmd(CM_TMRA_1, TMRA_CLR_COND_EVT, ENABLE);

    /* Start timerA */
    TMRA_Start(CM_TMRA_1);

}

//Timer0 Config
static void App_Timer0Cfg(void)
{
    stc_tmr0_init_t stcTmr0Init;

    /* Enable AOS clock */
    FCG_Fcg0PeriphClockCmd(FCG0_PERIPH_AOS, ENABLE);
    /* Timer0 trigger event set */
    AOS_SetTriggerEventSrc(AOS_TMR0, EVT_SRC_PORT_EIRQ0);

    /* Enable timer0_1 clock */
    FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_TMR0_1, ENABLE);

    /* Enable timer0_2 clock */
    FCG_Fcg2PeriphClockCmd(FCG2_PERIPH_TMR0_2, ENABLE);

    /************************* Configure TMR0_1_A***************************/
    (void)TMR0_StructInit(&stcTmr0Init);
    stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_XTAL32;
    stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV1;
    stcTmr0Init.u32Func = TMR0_FUNC_CMP;
    stcTmr0Init.u16CompareValue = (40U - 4U);
    (void)TMR0_Init(CM_TMR0_1, TMR0_CH_A, &stcTmr0Init);
    DDL_DelayMS(1U);
    TMR0_HWStartCondCmd(CM_TMR0_1, TMR0_CH_A, ENABLE);
    DDL_DelayMS(1U);
    TMR0_HWClearCondCmd(CM_TMR0_1, TMR0_CH_A, ENABLE);
    DDL_DelayMS(1U);

    /************************* Configure TMR0_2_A***************************/
    (void)TMR0_StructInit(&stcTmr0Init);
    stcTmr0Init.u32ClockSrc = TMR0_CLK_SRC_XTAL32;
    stcTmr0Init.u32ClockDiv = TMR0_CLK_DIV1;
    stcTmr0Init.u32Func = TMR0_FUNC_CMP;
    stcTmr0Init.u16CompareValue = 0xFFFFU;
    (void)TMR0_Init(CM_TMR0_2, TMR0_CH_A, &stcTmr0Init);
    DDL_DelayMS(1U);
    TMR0_HWStartCondCmd(CM_TMR0_2, TMR0_CH_A, ENABLE);
    DDL_DelayMS(1U);
    TMR0_HWClearCondCmd(CM_TMR0_2, TMR0_CH_A, ENABLE);
    DDL_DelayMS(1U);
}

//USARTx Config
static void App_USARTxCfg(void)
{
    stc_usart_uart_init_t stcUartInit;

    /* Enable USART1 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_USART1, ENABLE);
    /************************* Configure USART1***************************/
    USART_DeInit(CM_USART1);
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
    stcUartInit.u32ClockDiv = USART_CLK_DIV1;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_DISABLE;
    stcUartInit.u32Baudrate = 115200UL;
    stcUartInit.u32DataWidth = USART_DATA_WIDTH_8BIT;
    stcUartInit.u32StopBit = USART_STOPBIT_1BIT;
    stcUartInit.u32Parity = USART_PARITY_NONE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_16BIT;
    stcUartInit.u32FirstBit = USART_FIRST_BIT_LSB;
    stcUartInit.u32StartBitPolarity = USART_START_BIT_FALLING;
    stcUartInit.u32HWFlowControl = USART_HW_FLOWCTRL_RTS;
    USART_UART_Init(CM_USART1, &stcUartInit, NULL);
    USART_FilterCmd(CM_USART1, ENABLE);
    /* Enable USART_TX | USART_RX | USART_RX_TIMEOUT | USART_INT_TX_CPLT | USART_INT_RX_TIMEOUT function */
    USART_FuncCmd(CM_USART1, (USART_TX | USART_RX | USART_RX_TIMEOUT | USART_INT_TX_CPLT | USART_INT_RX_TIMEOUT), ENABLE);

    /* Enable USART3 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_USART3, ENABLE);
    /************************* Configure USART3***************************/
    USART_DeInit(CM_USART3);
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
    stcUartInit.u32ClockDiv = USART_CLK_DIV1;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_DISABLE;
    stcUartInit.u32Baudrate = 921600UL;
    stcUartInit.u32DataWidth = USART_DATA_WIDTH_8BIT;
    stcUartInit.u32StopBit = USART_STOPBIT_1BIT;
    stcUartInit.u32Parity = USART_PARITY_NONE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_16BIT;
    stcUartInit.u32FirstBit = USART_FIRST_BIT_LSB;
    stcUartInit.u32StartBitPolarity = USART_START_BIT_FALLING;
    stcUartInit.u32HWFlowControl = USART_HW_FLOWCTRL_RTS;
    USART_UART_Init(CM_USART3, &stcUartInit, NULL);
    USART_FilterCmd(CM_USART3, ENABLE);
    /* Enable USART_TX | USART_RX | USART_INT_TX_CPLT | USART_INT_RX function */
    USART_FuncCmd(CM_USART3, (USART_TX | USART_RX | USART_INT_TX_CPLT | USART_INT_RX), ENABLE);

    /* Enable USART4 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_USART4, ENABLE);
    /************************* Configure USART4***************************/
    USART_DeInit(CM_USART4);
    (void)USART_UART_StructInit(&stcUartInit);
    stcUartInit.u32ClockSrc = USART_CLK_SRC_INTERNCLK;
    stcUartInit.u32ClockDiv = USART_CLK_DIV1;
    stcUartInit.u32CKOutput = USART_CK_OUTPUT_DISABLE;
    stcUartInit.u32Baudrate = 9600UL;
    stcUartInit.u32DataWidth = USART_DATA_WIDTH_8BIT;
    stcUartInit.u32StopBit = USART_STOPBIT_1BIT;
    stcUartInit.u32Parity = USART_PARITY_NONE;
    stcUartInit.u32OverSampleBit = USART_OVER_SAMPLE_16BIT;
    stcUartInit.u32FirstBit = USART_FIRST_BIT_LSB;
    stcUartInit.u32StartBitPolarity = USART_START_BIT_FALLING;
    stcUartInit.u32HWFlowControl = USART_HW_FLOWCTRL_RTS;
    USART_UART_Init(CM_USART4, &stcUartInit, NULL);
    /* Enable USART_TX | USART_RX function */
    USART_FuncCmd(CM_USART4, (USART_TX | USART_RX), ENABLE);
}

//I2Cx Config
static void App_I2CxCfg(void)
{
    int32_t i32Ret;
    stc_i2c_init_t stcI2cInit;
    float32_t fErr;

    /* Enable I2C1 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_I2C1, ENABLE);
    /************************* Configure I2C1***************************/
    I2C_DeInit(CM_I2C1);

    (void)I2C_StructInit(&stcI2cInit);
    stcI2cInit.u32ClockDiv = I2C_CLK_DIV1;
    stcI2cInit.u32Baudrate = 400000UL;
    stcI2cInit.u32SclTime = 0UL;
    i32Ret = I2C_Init(CM_I2C1, &stcI2cInit, &fErr);
    if (LL_OK != i32Ret) {
        //Initialized failed, add your code here.
    }
    I2C_BusWaitCmd(CM_I2C1, ENABLE);


    /* Enable interrupt function*/
    I2C_IntCmd(CM_I2C1, I2C_INT_TX_CPLT | I2C_INT_RX_FULL | I2C_INT_TX_EMPTY | I2C_INT_ARBITRATE_FAIL | I2C_INT_GENERAL_CALL, ENABLE);

    /* Enable I2C3 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_I2C3, ENABLE);
    /************************* Configure I2C3***************************/
    I2C_DeInit(CM_I2C3);

    (void)I2C_StructInit(&stcI2cInit);
    stcI2cInit.u32ClockDiv = I2C_CLK_DIV1;
    stcI2cInit.u32Baudrate = 400000UL;
    stcI2cInit.u32SclTime = 0UL;
    i32Ret = I2C_Init(CM_I2C3, &stcI2cInit, &fErr);
    if (LL_OK != i32Ret) {
        //Initialized failed, add your code here.
    }
    I2C_BusWaitCmd(CM_I2C3, ENABLE);


    /* Enable interrupt function*/
    I2C_IntCmd(CM_I2C3, I2C_INT_TX_CPLT | I2C_INT_RX_FULL | I2C_INT_TX_EMPTY | I2C_INT_ARBITRATE_FAIL | I2C_INT_GENERAL_CALL, ENABLE);
}

//SPIx Config
static void App_SPIxCfg(void)
{
    stc_spi_init_t stcSpiInit;
    stc_spi_delay_t stcSpiDelay;

    /* Enable SPI3 clock */
    FCG_Fcg1PeriphClockCmd(FCG1_PERIPH_SPI3, ENABLE);
    /************************* Configure SPI3***************************/
    SPI_StructInit(&stcSpiInit);
    stcSpiInit.u32WireMode = SPI_4_WIRE;
    stcSpiInit.u32TransMode = SPI_FULL_DUPLEX;
    stcSpiInit.u32MasterSlave = SPI_MASTER;
    stcSpiInit.u32Parity = SPI_PARITY_INVD;
    stcSpiInit.u32SpiMode = SPI_MD_1;
    stcSpiInit.u32BaudRatePrescaler = SPI_BR_CLK_DIV2;
    stcSpiInit.u32DataBits = SPI_DATA_SIZE_8BIT;
    stcSpiInit.u32FirstBit = SPI_FIRST_MSB;
    stcSpiInit.u32SuspendMode = SPI_COM_SUSP_FUNC_OFF;
    stcSpiInit.u32FrameLevel = SPI_1_FRAME;
    (void)SPI_Init(CM_SPI3, &stcSpiInit);

    SPI_DelayStructInit(&stcSpiDelay);
    stcSpiDelay.u32IntervalDelay = SPI_INTERVAL_TIME_2SCK;
    stcSpiDelay.u32ReleaseDelay = SPI_RELEASE_TIME_2SCK;
    stcSpiDelay.u32SetupDelay = SPI_SETUP_TIME_2SCK;
    (void)SPI_DelayTimeConfig(CM_SPI3, &stcSpiDelay);

    /* SPI loopback function configuration */
    SPI_LoopbackModeConfig(CM_SPI3, SPI_LOOPBACK_INVD);
    /* SPI parity check error self diagnosis configuration */
    SPI_ParityCheckCmd(CM_SPI3, DISABLE);
    /* SPI valid SS signal configuration */
    SPI_SSPinSelect(CM_SPI3, SPI_PIN_SS0);
    /* SPI SS signal valid level configuration */
    SPI_SSValidLevelConfig(CM_SPI3, SPI_PIN_SS0, DISABLE);
    /* Enable interrupt function*/
    SPI_IntCmd(CM_SPI3, SPI_INT_ERR, ENABLE);
    /* Enable SPI3 */
    SPI_Cmd(CM_SPI3, ENABLE);
}

//RTC Config
static void App_RTCCfg(void)
{
    stc_rtc_init_t stcRtcInit;
    stc_rtc_date_t stcRtcDate;
    stc_rtc_time_t stcRtcTime;
    stc_rtc_alarm_t stcRtcAlarm;

    /* Reset RTC counter */
    if (LL_ERR_TIMEOUT != RTC_DeInit()) {
        /* Configure structure initialization */
        (void)RTC_StructInit(&stcRtcInit);

        /* Configuration RTC structure */
        stcRtcInit.u8ClockSrc = RTC_CLK_SRC_XTAL32;
        stcRtcInit.u8HourFormat = RTC_HOUR_FMT_24H;
        stcRtcInit.u8IntPeriod = RTC_INT_PERIOD_PER_HOUR;
        stcRtcInit.u8ClockCompen = RTC_CLK_COMPEN_DISABLE;
        (void)RTC_Init(&stcRtcInit);

        /* Configuration alarm clock time */
        stcRtcAlarm.u8AlarmHour = 0x23U;
        stcRtcAlarm.u8AlarmMinute = 0x55U;
        stcRtcAlarm.u8AlarmWeekday = RTC_ALARM_WEEKDAY_SUNDAY | RTC_ALARM_WEEKDAY_MONDAY | RTC_ALARM_WEEKDAY_TUESDAY | RTC_ALARM_WEEKDAY_WEDNESDAY | RTC_ALARM_WEEKDAY_THURSDAY | RTC_ALARM_WEEKDAY_FRIDAY | RTC_ALARM_WEEKDAY_SATURDAY;
        stcRtcAlarm.u8AlarmAmPm = RTC_HOUR_24H;
        (void)RTC_SetAlarm(RTC_DATA_FMT_BCD, &stcRtcAlarm);
        RTC_AlarmCmd(ENABLE);

        /* Update date and time */
        /* Date configuration */
        stcRtcDate.u8Year = 24U;
        stcRtcDate.u8Month = RTC_MONTH_JANUARY;
        stcRtcDate.u8Day = 1U;
        stcRtcDate.u8Weekday = RTC_WEEKDAY_MONDAY;

        /* Time configuration */
        stcRtcTime.u8Hour = 12U;
        stcRtcTime.u8Minute = 0U;
        stcRtcTime.u8Second = 0U;
        stcRtcTime.u8AmPm = RTC_HOUR_24H;

        if (LL_OK != RTC_SetDate(RTC_DATA_FMT_DEC, &stcRtcDate)) {
            return;
        }

        if (LL_OK != RTC_SetTime(RTC_DATA_FMT_DEC, &stcRtcTime)) {
            return;
        }
        /* Enable RTC interrupt */
        RTC_IntCmd(RTC_INT_PERIOD | RTC_INT_ALARM, ENABLE);
        /* Startup RTC count */
        RTC_Cmd(ENABLE);
    }
}

//WDT Config
static void App_WDTCfg(void)
{
    stc_wdt_init_t stcWdtInit;

    /* WDT configuration */
    stcWdtInit.u32CountPeriod   = WDT_CNT_PERIOD256;
    stcWdtInit.u32ClockDiv      = WDT_CLK_DIV4;
    stcWdtInit.u32RefreshRange  = WDT_RANGE_0TO100PCT;
    stcWdtInit.u32LPMCount      = WDT_LPM_CNT_STOP;
    stcWdtInit.u32ExceptionType = WDT_EXP_TYPE_RST;
    (void)WDT_Init(&stcWdtInit);

    /* First reload counter to start WDT */
    WDT_FeedDog();
}

/**
 * @}
 */

/**
 * @}
 */

/*******************************************************************************
 * EOF (not truncated)
 ******************************************************************************/
